Integrated circuit packaging is critical in the process of providing small and highly performing semiconductor devices. As such, it has a significant effect on the appearance and function of end-user devices, from computers to cell phones to embedded processors. Integrated circuit (IC) packaging has evolved through multiple types of packaging technologies including, for example, system in package, package on package, chips first packaging, and so forth.
System in package is a technology that allows the placement of several integrated circuits in one package, providing a complete set of device electronics in a small area. Package on package places one package on top of another for greater integration complexity and interconnect density. System in package and package on package techniques typically use wire bonding to connect the IC die and the package. Unfortunately, although wire bonding is a useful packaging technique, the wires take up valuable board space. Accordingly, flip chip techniques have been developed to eliminate wire bonding. In a flip chip process, an IC die is connected face-down to a board or substrate using ball grid array or other conductive bumps. This technique eliminates wire bonds, increases speeds and reduces size.
Chips-first packaging has been developed to counter the limitations of wire bonding and some ball grid array techniques. In chips-first packaging, the IC die or dies are mounted face up to an inert substrate and the interconnect circuit is then built above the IC chips. The interconnect is formed to the IC chips as an integral part of the processing of the circuit board, thus eliminating the need for wire bonds, tape-automated bonds (TABs), or solder bumps.
A conventional chips-first packaging technique entails utilizing a support substrate upon which an acrylic thermal release adhesive tape is attached. To ensure clean release of a panel of IC dies, a silicone adhesive tape is then added on top of the thermal release tape. Each of the IC dies is attached with its active surface, i.e., that surface of the IC die having bond pads, face down on the silicone adhesive to hold it in place. A mold is placed around the IC dies and a molding material (such as a liquid epoxy resin) is then applied over the IC dies within the mold with the tape defining the bottom surface of the mold. After the molding material has been cured, the support substrate is removed from the encapsulated structure and the interconnect circuitry is built above the IC dies.
In the above process, the acrylic thermal release tape is used to facilitate release of the cured encapsulated structure from the support substrate. Unfortunately, thermal release tape can be problematic due to its temperature sensitive nature. In some examples, its adhesion properties can be drastically reduced at elevated temperatures, e.g., at about 150° C., even for the highest temperature grade thermal release tape. Unfortunately, a reduction in the adhesion properties of the thermal release tape can cause the IC dies in some examples to drift from a desired location within the encapsulated structure. In addition, this prior art technique may be undesirably complex, utilizes costly and short shelf life liquid compounds, and requires multiple material layers and processing steps, thus driving up cost and introducing the probability of reliability issues. Accordingly, what is needed is a method for effectively encapsulating IC dies undergoing chips-first packaging that can be readily implemented in existing packaging methodologies.